some more work

thesis/chapters/appendix.tex

@@ -0,0 +1,68 @@
+% vim: ft=tex
+\section{Appendix}
+
+\subsection{Source Code for the Benchmarks}
+\label{ref:code_benchmarks}
+
+The benchmarks used in \ref{ref:performance} are done using this code. Note
+that the execution time is measured which is inherently noisy. To account for
+the noise several strategies are used:
+
+\begin{enumerate}[1]
+    \item{The same circuit is applied to the starting state several times. The
+        minimal result is used as the noise must be positive}
+    \item{Several circuits are applied to the starting state. The remaining
+        noise is mixed with the variance due to the different circuits.}
+    \item{Because the noise can be timely correlated (i.e. another process
+        requires processor time for a longer period) the tests have been
+        randomized such that the time correlated noise is distributed randomly over
+        several uncorrelated measurements.}
+\end{enumerate}
+
+The code used to benchmark the three regimes is analogous and not included here.
+
+\lstinputlisting[title={Generating Data for the Dense State Vector vs. Graphical Simulator Benchmark}, language=Python, breaklines=true]{../performance/generate_data_scaling_qbits.py}
+
+\lstinputlisting[title={Code for Measuring and Computing the Execution Time and Statistics}, language=Python, breaklines=true]{../performance/measure_circuit.py}
+
+\subsection{Complete Graphical States from the Three Regimes}
+\label{ref:complete_graphs}
+
+Because the whole graphs are barely percetible windows have been used
+in Figure \ref{fig:graph_high_linear_regime} and Figure \ref{fig:graph_intermediate_regime}.
+For the sake of completeness the whole graphs are included here in Figure \ref{fig:graph_low_linear_regime_full},
+Figure \ref{fig:graph_intermediate_regime_full} and Figure \ref{fig:graph_high_linear_regime_full}.
+
+\begin{figure}[H]
+    \centering
+    \includegraphics[width=\linewidth]{graphics/graph_low_linear_regime.png}
+    \caption[Typical Graphical State in the Low-Linear Regime]{Typical Graphical State in the Low-Linear Regime}
+    \label{fig:graph_low_linear_regime_full}
+\end{figure}
+
+\begin{figure}[H]
+    \centering
+    \includegraphics[width=\linewidth]{graphics/graph_intermediate_regime.png}
+    \caption[Typical Graphical State in the Intermediate Regime]{Typical Graphical State in the Intermediate Regime}
+    \label{fig:graph_intermediate_regime_full}
+\end{figure}
+
+\begin{figure}[H]
+    \centering
+    \includegraphics[width=\linewidth]{graphics/graph_high_linear_regime.png}
+    \caption[Typical Graphical State in the High-Linear Regime]{Typical Graphical State in the High-Linear Regime}
+    \label{fig:graph_high_linear_regime_full}
+\end{figure}
+
+\subsection{Code to Generate the Example Graphs}
+\label{ref:code_example_graphs}
+
+This code has been used to generate the example graphs used in
+\ref{ref:performance}. Note that generating the graph is done using a random
+circuit as used in \ref{ref:code_benchmarks}. The generated \lstinline{dot}
+code is converted to an image using 
+\lstinline{dot i_regime.dot -Tpng -o i_regime.png}.
+
+\lstinputlisting[title={Code used to Generate the Example Graphs}, language=Python, breaklines=true]{../performance/regimes/graph_intermediate_regime.py}
+
+

thesis/chapters/implementation.tex

@@ -208,7 +208,7 @@ The edges are stored in an adjacency matrix
 \begin{equation}
 \begin{aligned}
     a_{i,j} = \left\{ \begin{array}{c} 1 \mbox{, if } \{i,j\} \in E\\
-                            0 \mbox{, if} \{i,j\} \notin E \end{array}\right.
+                            0 \mbox{, if } \{i,j\} \notin E \end{array}\right.
                             .
 \end{aligned}
 \end{equation}
@@ -233,9 +233,6 @@ implemented in \lstinline{C} and are exported to python3 in the class
 \lstinline{RawGraphState}. This class has three main methods to implement the
 three classes of operations. 
 
-%
-%
-%
 \begin{description} 
     \item[\hspace{-1em}]{\lstinline{RawGraphState.apply_C_L}\\
         This method implements local clifford gates. It takes the qbit index
@@ -408,12 +405,14 @@ qbits:
 
 The reason for this scaling will be clear later; one can observe that the
 performance of the graphical simulator increases in some cases with growing
-number of qbits when the circuit length is constant.
+number of qbits when the circuit length is constant. The code used to generate the
+data for these plots can be found in \ref{ref:code_benchmarks}.
 
 As described by \cite{andersbriegel2005} the graphical simulator is exponentially
 faster than the dense vector simulator. According to \cite{andersbriegel2005} it
 is considerably faster than a simulator using the straight forward approach simulating
-the stabilizer tableaux like CHP \cite{CHP}.
+the stabilizer tableaux like CHP \cite{CHP} with an average runtime behaviour
+of $\mathcal{O}\left(n\log(n)\right)$ instead of $\mathcal{O}\left(n^2\right)$.
 
 One should be aware that the gate execution time (the time required to apply a gate
 to the state) highly depends on the  state it is applied to. For the dense vector 
@@ -448,33 +447,36 @@ regimes:
 
 \begin{figure}
     \centering
-    \includegraphics[width=\linewidth]{../performance/regimes/graph_low_linear_regime.png}
+    \includegraphics[width=\linewidth]{graphics/graph_low_linear_regime.png}
     \caption[Typical Graphical State in the Low-Linear Regime]{Typical Graphical State in the Low-Linear Regime}
     \label{fig:graph_low_linear_regime}
 \end{figure}
 
 \begin{figure}
     \centering
-    \includegraphics[width=\linewidth]{../performance/regimes/graph_intermediate_regime.png}
-    \caption[Typical Graphical State in the Intermediate Regime]{Typical Graphical State in the Intermediate Regime}
+    \includegraphics[width=\linewidth]{graphics/graph_intermediate_regime_cut.png}
+    \caption[Window of a Typical Graphical State in the Intermediate Regime]{Window of a Typical Graphical State in the Intermediate Regime}
     \label{fig:graph_intermediate_regime}
 \end{figure}
 
 \begin{figure}
     \centering
-    \includegraphics[width=\linewidth]{../performance/regimes/graph_high_linear_regime.png}
-    \caption[Typical Graphical State in the High-Linear Regime]{Typical Graphical State in the High-Linear Regime}
+    \includegraphics[width=\linewidth]{graphics/graph_high_linear_regime_cut.png}
+    \caption[Window of a Typical Graphical State in the High-Linear Regime]{Window of a Typical Graphical State in the High-Linear Regime}
     \label{fig:graph_high_linear_regime}
 \end{figure}
 
 These two regimes can be explained when considering the graphical states that
 typical live in these regimes. With increased circuit length the amount of
 edges increases which makes toggling neighbourhoods harder. Graphs from the
-low-linear, intermediate and high-linear regime can be seen in
-Figure \ref{fig:graph_low_linear_regime}, Figure \ref{fig:graph_intermediate_regime} and
-Figure \ref{fig:graph_high_linear_regime}. The latter is hardly visible; this is due
-to the great amount of edges in this regime. Further the regimes are not clearly
-visibe for $n>30$ qbits so choosing smaller graphs is not possible. 
+low-linear, intermediate and high-linear regime can be seen in Figure
+\ref{fig:graph_low_linear_regime}, Figure \ref{fig:graph_intermediate_regime}
+and Figure \ref{fig:graph_high_linear_regime}. Due to the great amount of edges
+in the intermediate and high-linear regime the pictures show a window of the
+actual graph.  The full images are in \ref{ref:complete_graphs}.  Further the
+regimes are not clearly visibe for $n>30$ qbits so choosing smaller graphs is
+not possible. The code that was used to generate these images can be found
+in \ref{ref:code_example_graphs}.
 
 The Figure \ref{fig:scaling_circuits_measurements_linear} brings more substance
 to this interpretation. In this simulation the Pauli $X$ gate has been replaced